Similarly, we ran 100 builds on InTime and the results are superimposed below on the previous Seeds chart. (Click here for more information about InTime). Our InTime design optimization tool uses a bigger mix of synthesis and placement/route settings. Step 2: Run InTimeĪ Placement Seed is typically regarded as a placement setting. Note that the original TNS was -183ns, and that is already closer to the peaks with better results. What is interesting here is that we expected more of a normal distribution with a single peak, rather than 2 peaks here. We cut off the "underflow" bin at -500ns as that tail is very long and we are only interested in better TNS results. The best result is in the -100ns to -80ns bin. The following histogram shows the TNS results in nanoseconds. The first step we did was to run 100 seeds. Placement Seeds are the linchpins of design exploration for many Quartus users. % improvement over original TNS / % improvement over original WNS.Average for results >-500ns (for TNS) / Average for results >-0.5ns (for WNS).However, to keep this simple, we use only the criteria below.
"Good" can be defined based on a series of different statistics. One of the things we understand about design exploration is that there is a certain level of noise and randomization present in many of the algorithms used. Hence, although the best result is what we want, it is important to measure how "good" the whole exploration is.
This resulted in a 246ps Worst Setup Slack failure.įPGA Tool Version: Quartus Prime Pro Edition 19.1 Interpreting the results Feeling aggressive, we edited the SDC file to increase the target clock frequency to 800MHz. This is, of course, Fast Fourier Transform - a common IP block or function implemented on FPGA using DSPs.įMax: 650MHz originally, now over-constrained to 800MHzĪt 650MHz, the design has no timing issues. Our goal is to see that InTime performs well for RTL generated in this manner. One of InTime's key value propositions is that you can avoidchanging the RTL but get better results. We are always measuring how well design exploration performs for newer device families and tools.